Silicom PE210G2BPi9 10G Bypass NIC Ethernet Intel
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Silicom’s dual port fiber 10 Gigabit Ethernet Bypass server adapter is a PCI-Express X8 network interface card that contains two fiber (SR)10 Gigabit Ethernet ports on a PCI-E adapter. The Silicom’s dual port fiber (SR) 10 Gigabit Ethernet Bypass server adapter is targeted to inline network system that maintains network connectivity when system fails.
Silicom’s dual port fiber 10 Gigabit Ethernet Bypass server adapter supports Normal, Bypass and Disconnect modes. In Normal mode, the ports are independent interfaces. In Bypass mode, all packets received from one port are transmitted to the adjacent port. In Disconnect mode, the adapter simulates switch / rout cable disconnection. Silicom Bypass server adapters can Bypass or disconnect its Ethernet ports on a host system failure, power off, or upon software request.
In Bypass mode, the connections of the Ethernet ports are disconnected from the system and switched over to the other port to create a crossed connection loop-back between the Ethernet ports. Hence, in bypass mode all packets received from one port are transmitted to the adjacent port and vice versa. This feature enables to bypass a failed system and provides maximum up time for the network.
Silicom’s dual port fiber 10 Gigabit Ethernet Bypass server adapter includes an on board WDT (Watch Dog Timer) controller. The adapter’s software drivers or software application can write commands to the on board WDT controller. The adapter’s software drivers, WDT controller and the Bypass circuitry provide an interface that control and manage the mode of the adapter.
Silicom’s dual port fiber 10 Gigabit Ethernet Bypass server adapters are based on Intel 82599ES Ethernet controller
Bypass / Disconnect:
- Bypass / Disconnect Ethernet ports on Power Fail, System Hangs or Software Application Hangs
- Software programmable Bypass, Disconnect or Normal Mode
- On Board Watch Dog Timer (WDT) Controller.
- Software programmable time out interval.
- Software Programmable WDT Enable / Disable counter.
- Software programmable Bypass Capability Enable / Disable.
- Software Programmable Disconnect Capability Enable / Disable.
- Software Programmable mode (Bypass, Normal or Disconnect mode) at Power up
- Software Programmable mode (Bypass, Normal mode) at Power off
- Independent Bypass operation in every two ports.
- Emulates standard NIC
Fiber 10 Gigabit Ethernet 10GBASE-SR:
- 10 Gigabit Fiber Ethernet port supports 10GBASE-SR (850nM LAN PHY)
- 10 Gigabit 850nM Small form Factor Pluggable (SFP+)
Fiber 10 Gigabit Ethernet 10GBASE-LR:
- 10 Gigabit Fiber Ethernet port supports 10GBASE-LR (1310nM LAN PHY)
- 10 Gigabit 1310nM Small form Factor Pluggable (SFP+)
Fiber 10 Gigabit Ethernet 10GBASE-SR5 (SR 50uM):
- 10 Gigabit Fiber Ethernet port supports 10GBASE-SR (850nM LAN PHY)
- 10 Gigabit 850nM Small form Factor Pluggable (SFP+)
-SRD: Fiber 1/10 Gigabit Ethernet 1000Base-SX / 10GBASE-SR:
- 10 Gigabit Fiber Ethernet port supports 10GBASE-SR (850nM LAN PHY)
- 1Gigabit Fiber Ethernet port supports 1000BASE-SX (850nM LAN PHY)
- 1/10Gigabit 850nM Small form Factor Pluggable (SFP+)
-LRD: Fiber 1/10 Gigabit Ethernet 1000Base-LX / 10GBASE-LR:
- 10 Gigabit Fiber Ethernet port supports 10GBASE-LR (1310nM LAN PHY)
- 1Gigabit Fiber Ethernet port supports 1000BASE-LX (1310nM LAN PHY)
- 1/10Gigabit 1310nM Small form Factor Pluggable (SFP+)
Fiber 10 Gigabit Ethernet 10GBASE-SR5 (SR 50uM):
- 10 Gigabit Fiber Ethernet port supports 10GBASE-SR (850nM LAN PHY)
- 10Gigabit 850nM Small form Factor Pluggable (SFP+)
Performance Features:
- IPV4 and IPV6 Supports for IP/ TCP and IP/UDP Receive Checksum offload
- Fragmented UDP checksum offload for Packet Reassembly
- CPU utilization- the 82599 supports reduction in CPU utilization, mainly by supporting Receive Side Coalescing (RSC)
- Support for 16 virtual machine Device Queues ( VMDq) per port
- Support Direct Cache Access ( DCA)
- Advanced memory architecture reduces latency by preceding TSO packets. A TSO packet may be interleaved with other packets going to the wire
- Minimized device I/O interrupts using MSI and MSI-X
- Offload of TCP / IP / UDP checksum calculation and TCP segmentation
- Large on chip receive packet buffer (512 KB)
- Large on chip transmit packet buffer ( 160 KB)
- Supports the VPD (Vital Product Data) capability defined in the PCI specification ver. 3.0.
- Time sync- IEEE1588- Precision Time Protocol (PTP)
- Supports the BCN (Backward Congestion Notification) protocol in addition to the EEDC functionality
Host Interface:
- PCI Express X8 lanes
- Support PCI Express Base Specification 2.0 (5GT/s)
- Common Key Features:
- IEEE 802.x flow control support
- IEEE 802.q VLAN tagging support
- Supports a mode where all received and sent packets have at least one VLAN tag in addition to the regular tagging
- IEEE 802.1p layer 2 priority encoding
- Jumbo Frame (up to 16KB)
- Link Aggregation and Load Balancing
- RFC2819 RMON MIB statistics
- TCP Segmentation Offload Up to 256KB
- Ipv6 Support for IP/TCP Receive Checksum Offload
- DDP Offload
- LEDs indicators for link/Activity/Bypass/ Disconnect Mode status
- Hot Plug not supported. Can be supported by assembly change
- Low power
- LC connector
| Bypass Specifications: | |
| WDT Interval (Software Programmable): | 3,276,800 mSec (3 |
