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Napatech NT20E2-PTP network adapter

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NT20E2-PTP
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20 Gbps Packet Capture, Analysis and Replay
The NT20E2-PTP accelerator provides full packet capture and analysis of Ethernet LAN and WAN (SONET/SDH) data at 20 Gbps with zero packet loss for all frame sizes.Transmit or replay of Ethernet traffic at 20 Gbps is provided with full transmission control. Intelligent features for flow identification, filtering and distribution to up to 32 CPU cores accelerate application performance with extremely low CPU load. Flexible time synchronization support including onboard IEEE 1588-2008 (PTP v2). The NT20E2-PTP accelerator can also be used in in-line applications.

Up to 160 Gbps Throughput
Napatech Software Suite enables you to merge data from up to 8 accelerators. When used with NT20E2-PTP accelerators, this can provide up to 160 Gbps of total throughput per appliance. In other words, you can monitor 16 locations at 10 Gbps port speed, merge the data from these locations into a single analysis stream and then correlate the information from these multiple locations to provide an end-to-end view of what is happening in the network.

Extreme Precision and Flexibility
Merging of data from multiple ports into a single analysis stream requires extreme timing precision. That’s why Napatech supports 4 nanosecond time-stamp resolution on the NT20E2-PTP accelerator. With this precision, it is possible to merge Ethernet frames from multiple ports in the correct time-order allowing more accurate analysis. The NT20E2-PTP features on-board IEEE 1588-2008 (PTP v2) support with a complete PTP software stack as well as support for Pulse-Per-Second (PPS) time synchronization inputs. This allows flexible support of whatever time synchronization mechanism is available during deployment.

Hardware Time Stamp
The ability to establish the precise time when frames have been captured is critical to many applications. To achieve this, all Napatech accelerators are capable of providing a high-precision time stamp with nanosecond resolution for every frame captured and transmitted. At 10 Gbps, an Ethernet frame can be received and transmitted every 67 nanoseconds. At 100 Gbps, this time is reduced to 6.7 nanoseconds. This makes nanosecond precision time-stamping essential for uniquely identifying when a frame is received. This precision also enables you to merge frames from multiple ports on multiple.

Full line-rate packet capture
Napatech accelerators are highly optimized to capture network traffic at full line rate, with almost no CPU load on the host server, for all frame sizes. These capabilities set Napatech accelerators apart from any other network adapters in the industry. Zero-loss packet capture is critical for applications that need to analyze all the network traffic in real-time. If anything needs to be discarded, it is a matter of choice by the user, not a limitation of the accelerator. Standard Network Interface Cards (NICs) are not designed for analysis applications where all traffic on a connection.

Frame buffering
Napatech accelerators provide on-board memory for buffering of Ethernet frames.Buffering assures guaranteed delivery of data even when there is congestion. There are three potential sources of congestion; the first source of congestion is the PCI interface, the second is the server platform and the third is the analysis application. PCI interfaces provide a fixed bandwidth for transfer of data from the accelerator to the application. For some accelerators, this can limit the amount of data that can be transferred from the network to the application. For example, an 8-lane PCIe Gen 3 interface.

Full Line-Rate Transmit
Full line-rate transmit is an important capability for a number of test and analysis applications. Testing network performance under maximum load is increasingly important to assure quality of experience, but also to harden networks against attacks, such as Distributed Denial of Service (DDoS) attacks. Napatech accelerators make it possible to build solutions where the maximum transmission capability can be achieved to thoroughly test network resilience. With Napatech accelerators, the frames to be transmitted are either generated by the application, replayed frames that were previously.

Frame and protocol information
For each frame received, frame and protocol information is made available to the host application. This is provided in the form of a descriptor with a structured format that is provided together with each frame captured. This makes it quick and easy for the analysis application to find the important information that it needs. The frame descriptor includes the following information: High-precision time-stamp Protocol and tunnel information Encapsulation information Hash key information for flow identification Offset start of L3, L4 and L5 payloads Coloring tags defined by filters Checksum.

Time Stamp Injection
Napatech accelerators can both time-stamp captured and transmitted frames. By time-stamping transmitted frames, it is possible to measure the time it takes for this frame to traverse the network, which is useful for test and measurement purposes and assuring Quality of Experience. Since transmission can be based on generated frames, frames replayed from disk and retransmission of frames, Napatech accelerators use a time-stamp injection mechanism that allows the time stamp to be transported within the standard Ethernet frame format.

Buffer size configuration
Buffer size configuration can have a dramatic effect on the performance of analysis applications. Different applications have different requirements when it comes to latency or processing. It is therefore important that the number and size of buffers can be optimized for the given application. Napatech accelerators make this possible.The flexible server buffer structure supported by Napatech accelerators can be optimized for different application requirements.

Local Retransmit
Local retransmit allows traffic to be received by the Napatech accelerator and retransmitted back to the network at full line rate, without utilizing the host CPU, host memory, or PCI bandwidth. This useful when traffic needs to be analyzed by more than one appliance or the load needs to be spread amongst several appliances. It is also useful when certain traffic does not need to be analyzed and just needs to be forwarded. Local retransmit can be enabled while frames are being captured.

Onboard IEEE 1588-2008 (PTP v2) support
IEEE 1588-2008, also known as precision time protocol (PTP), is a standard designed for local systems requiring accurate synchronization. Time synchronization using IEEE 1588 is easy and flexible because the IEEE 1588 timing information can be distributed using standard category 5 cabling already available in the local area network. Several Napatech accelerators support PTP. The latest Napatech accelerators provide onboard IEEE 1588-2008 PTP support that can be used for applications requiring nanosecond time-stamping and time synchronization.

Inter-Frame Gap Control
The inter-frame gap (IFG) is the time delay or gap between frames when they are transmitted. This is normally 96 bit times, which corresponds to 9.6 ns for 10 Gbps transmission, but can be changed without affecting the integrity of the transmission. This can be required to adapt to different network situations and applications. With Napatech accelerators it is possible to precisely control the IFG. It is possible to control the IFG individually for each frame transmitted.

Frame Classification
Ethernet-based networks are designed to be generic, frame-based media for carrying all kinds of protocols, not only TCP/IP. For users that want to monitor the network traffic in the most efficient way, it is therefore important to be able to recognize as many protocols as possible. Napatech accelerators have a unique set of features for extracting information from the layer 2-4 network traffic. Header information for the various protocols transported over Ethernet and made available for analysis.

HW Time Synchronization
With hardware time stamps, individual frames can be time-stamped with high precision. But, to assure that the time stamps in frames from different accelerators in the same or even different appliances are comparable, the clocks driving the time stamp engines need to be synchronized. Napatech has the worlds most advanced HW time synchronization between accelerators. There are various mechanisms to provide time synchronization including synchronization with the operating system clock or OS time synchronization.

Extended RMON1 port statistics
Napatech accelerators have full RMON1 support for i.e.: Frames received Frames received by size interval Bytes received Broadcast, multicast and unicast frames received Fragmented frame details Frames discarded with specification of reason Frames with CRC, alignment or code errors Frames with ISL, VLAN and VLAN tags Undersized/small frames both good and bad Oversized/large frames both good and bad Collisions detected Large hard-sliced frames both good and bad Link down occurrences

Advanced Statistics
In addition to the statistics provided by the Extended RMON1 counter set, Napatech accelerators also provide a range of additional counters that provide useful information for analysis purposes. This includes counters for coloring features and stream ID counters that provide statistics per streams of associated frames. Advanced Statistics provides counts of the following: Frames and bytes matching the coloring filter per color Forward frames and bytes per stream ID Frames and bytes received while the stream ID is inactive Dropped frames and bytes per stream ID

Synchronized statistics delivery
For the counters and statistics collected to be useful, they need to be correlated with the actual data captured or transmitted. To enable this, the generated statistical data is time-stamped with the same precision as captured frames. The accelerator collects statistics for a certain defined period of time. Once the time interval is reached, the block of statistics is time-stamped with the same clock and time-stamp engine as is used for time-stamping of captured frames. The block is then transferred to memory where it is available to the analysis application.

Monitoring sensors
Napatech accelerators are designed and built for high reliability and long life use. Analysis applications run constantly usually at high throughput rates. There is therefore a need for highly reliable products that can sustain this kind of performance. Napatech accelerators provide monitoring sensors that allow users to monitor performance and detect issues before they occur assuring a long lifetime for Napatech accelerators and protection of investment. Sensors on the accelerators provide extensive monitoring.

Flow identification based on hash keys
A flow can be defined as Ethernet frames that are associated. The association can be created by comparing various information in the Ethernet and encapsulated protocol headers. One way of doing this is to calculate a hash based on the value of specified header information. All frames with the same hash result are associated and handled in the same way. Often, network applications need to look at flows of frames that are transmitted between specific devices (identified by their IP addresses) or even between applications on specific devices

Dynamic hash key selection
Napatech accelerators offer a wide range of hash-key calculation methods for identifying flows. Manually selecting the calculation method to suit the type of traffic can be complicated, especially if there is a mix of traffic.To address this need, Napatech accelerators provide the capability to dynamically select the hash key calculation method based on the type of traffic being analyzed. Rules can be configured to assign the type of hash-key calculation method depending on the type of protocol received.For example, a rule can be established that if a TCP frame is received, a 5-tuple hash-key.

Frame and flow filtering
One of the main challenges in analyzing real-time data in high-speed networks is the sheer volume of data to be analyzed. Reducing the amount of data to be analyzed can often accelerate the performance of analysis applications. Napatech advanced Frame and Flow filtering has been built from more than ten years experience in the field. Napatech accelerators have the ability to identify network protocols and flows of associated Ethernet frames. Using this information, it is possible to filter the frames and flows that are presented to the application for analysis.

Deduplication
In some situations, when network traffic is analyzed, large amounts of duplicate frames are received. This can be due to routing configurations or retransmissions of frames. For server applications analyzing such traffic, it can be very time-consuming to recognize and discard these frames. Napatech has for years had advanced deduplication support. Napatech accelerators implement a deduplication functionality that can remove duplicate frames, so that only unique frames according to the a specified classification criteria are transferred to the server application.

Slicing
Napatech accelerators address one of the main challenges in analyzing real-time data in high-speed networks: the sheer volume of data to be analyzed. Reducing the amount of data to be analyzed can often accelerate the performance of analysis applications. Slicing is a feature designed to remove parts of a frame. This is often used when there is a need to analyze packet headers only, or where the timing of frames is the main concern. In such situations, the packet payload that is not required can be removed. Since the payload is often the largest part of the Ethernet frame.

Intelligent multi-CPU distribution
Modern servers provide unprecedented processing power with multi-core CPU implementations. This makes standard servers an ideal platform for appliance development. But, to fully harness the processing power of modern servers it is important that the analysis application is multi-threaded and that the right Ethernet frames need to be provided to the right CPU core for processing. Not only that, but the frames need to be provided at the right time to ensure that analysis can be performed in real time. Napatech Multi-CPU distribution is built and optimized from our close knowledge of server.

Cache pre-fetch optimization
Napatech accelerators make optimal use of the latest cache pre-fetch mechanisms to ensure fast processing of data by analysis application. This unique approach also ensures that delays and congestion are minimized leading assuring guaranteed delivery. Modern server CPUs use several layers of memory for processing of data. There are three levels of cache memory for fast processing as well as RAM. Access times for level 1 cache are much faster than level 2, which are in turn are faster than level 3. For real-time applications, it is essential to optimize cache utilization to ensure as fast.

Coloring
Some analysis applications need a mechanism to categorize frames that need to be processed differently. With Napatech accelerators, the filtering logic can be used to define categories of frames. A color tag is assigned to frames that are of the same category. The analysis application can then use this color tag to recognize frames that should be processed in a specific way. The Napatech accelerators can assign a color to any category of frame specified by the customer application via the 64 programmable adapter filters. The tags are communicated to the analysis application in each packet.

IP fragment handling
IP fragmentation occurs when large Ethernet frames need to be broken into several fragments in order to be transmitted across the network. This can be due to limitations in certain parts of the network or when tunneling protocols are used. Fragmented frames are a challenge for analysis applications as all fragments need to be identified and reassembled before analysis can be performed. Napatech accelerators can identify frame fragments and ensure that these are associated and sent to the same CPU core for processing. This significantly reduces the processing burden for analysis applications.

Checksum verification
Verifying the Ethernet frame check sequence (FCS) and checksums for IP, UDP and TCP can be costly for analysis applications. By off-loading this task, Napatech accelerators can free up valuable CPU cycles and accelerate the performance of the analysis applications. By performing the verification on the accelerator, it also ensures that bad frames are not sent for analysis thus consuming bandwidth, memory and CPU cycles.

Checksum generation
Generating the Ethernet frame check sequence (FCS) and checksums for IP, UDP and TCP can be costly for transmission applications. By off-loading this task, Napatech accelerators can free up valuable CPU cycles and accelerate the performance of the transmission application. The Napatech accelerator can perform the generation much faster in hardware ensuring that there is a minimal delay and that transmission timing can be maintained.

Synchronized transmit
Test and measurement applications normally focus on a specific part of the network, such as protocol analysis or latency measurement. However, there is a growing need for network-wide solutions that can test the network as a whole. This can include testing network behavior for Quality of Experience purposes or resilience against a security attack, such as distributed denial of service (DDoS) attacks. Napatech accelerators provide the capability to transmit frames based on precise time-stamps. In addition, Napatech accelerators can be time synchronized to ensure that clocks on different.

Multi-port data merge
Napatech accelerators typically provide multiple ports. Ports are typically paired as one port received upstream data and another port receives downstream data. Since there can be flows in both direction that need to be analyzed as one, there is a need to merge the data from both ports into a single analysis stream. Napatech accelerators can merge data received on multiple ports in hardware using the precise time-stamps of each Ethernet frame. This is highly efficient and offloads a significant and costly task from the analysis application.

Multi-accelerator data merge
Many analysis applications only monitor and analyze at a single point in the network. Yet, there is a growing need for analysis appliances that monitor and analyze multiple points in the network and even provide a network-wide view of what is happening. This requires multiple accelerators to be installed in a single appliance. But, it also requires that the analysis data from all of these accelerators needs to be correlated. With the Napatech Software Suite, it is possible to merge the analysis data from multiple accelerators into a single analysis stream.

GTP tunneling support
In mobile networks, all subscriber Internet traffic passes through one point in the network, namely the GPRS tunneling protocol (GTP) tunnel between the signaling and gateway serving nodes. This is known as the Gn interface in 3G networks and the S5 interface in 4G networks. Monitoring this interface is crucial for assuring Quality of Service (QoS). Napatech accelerators open up this interface, providing visibility and insight into the contents of the GTP tunnels.

IP-in-IP tunneling support
An IP-in-IP tunnel is a mechanism for transporting IP packets over an IP network outside of the senders control or where the protocol version is different. IP-in-IP is increasingly important as enterprise and mobile networks make the transition from IPv4 to IPv6. As the number of IPv4 addresses available continues to decline, there will be a growing need to use IPv6, but existing IPv4 addresses will still remain. There is therefore a need to transport IPv4 over IPv6 and vice versa.

Filtering inside tunnels
Napatech filtering features are normally applied to the Ethernet frame and payload. But, with tunnels there is a payload within the payload that needs to be analyzed. Napatech accelerators take account of this by recognizing tunnels and extracting the contents of tunnels for analysis. For filtering purposes, it is possible to specify whether filtering logic should be applied to the contents of the tunnel, such as the inner IP headers or the outer IP headers.

Slicing inside tunnels
Napatech slicing features are normally applied to the Ethernet frame and payload. But, with tunnels there is a payload within the payload that needs to be analyzed. Napatech accelerators take account of this by recognizing tunnels and extracting the contents of tunnels for analysis. For slicing purposes, it is possible to specify whether slicing should be performed on the contents of the tunnel, such as the inner IP headers or the outer IP headers.This enables the analysis application to reduce the amount of traffic that needs to be analyzed.

Multi-service correlation
Napatech accelerators have the ability to identify bidirectional data flows where two endpoints are involved in the exchange of information. However, there are situations where a single endpoint is associated with multiple other endpoints. A good example is a smartphone user accessing multiple apps from the same device at the same time. Mobile analysis applications need to analyze all these services associated with this smartphone user in order to ensure that he is provided with the best Quality of Experience.In order to do this, all flows associated with the smartphone user.

Network Interfaces

  • Standard: IEEE 802.3 10 Gbps Ethernet LAN
  • IEEE 802.3 WAN PHY Ethernet Over SONET OC192c
  • Physical interface: 2 x SFP+ ports
Supported modules
  • 10GBASE-SR (Multi-mode, 850 nm)
  • 10GBASE-LR (Singlemode, 1310 nm)
  • 10GBASE-ER (Singlemode, 1550 nm)
  • 10GBASE-CR (Direct Attach copper)
Performance
  • Capture rate: 2 x 10 Gbps
  • Transmit rate: 2 x 10 Gbps
  • CPU load: < 5%
On-board IEEE 1588-2008 (PTP v2)
  • Full IEEE 1588-2008 stack
  • Packet Delay Variation (PDV) filter
  • PTP master and slave in IEEE-1588-2008 default profile
  • PTP slave in IEEE 1588-2008 telecom and power profiles
Hardware Time Stamp
  • Resolution: 4 ns
Time formats
  • PCAP-ns/-Œºs
  • Native
  • NDIS 10 ns/100 ns
  • UNIX 10 ns
Time Synchronization
  • External connectors: Dedicated pluggable
  • Internal connectors: 2 for daisy-chain support
Pluggable options for time synchronization
  • PPS for GPS and CDMA
  • IEEE 1588-2008 (PTP v2)
  • NT-TS for accelerator-to-accelerator time sync
Host interface and memory
  • Bus type: PCIe Gen2
  • Bus width: 8 lane
  • Bus speed: 5 GT/s
  • PCIe performance: 25 Gbps full duplex
  • Onboard RAM: 2 GB DDR3
  • Flash: Support for 2 boot images
Statistics
  • RMON1 counters plus jumbo frame counters per port
  • Frame and byte counters per color (filter) and per host buffer
  • Counter sets always delivered as a consistent time-stamped snapshot
Environment
  • Power consumption: 26.5 Watts including SFP+ SR modules
  • Operating temperature: 0 to 45C (32 to 113F)
  • Operating humidity: 20% to 80%
  • MTBF: 184,424 hours according to RIAC-HDBK-217Plus
Sensors
  • Temperature
  • Power
OS support
  • Linux
  • FreeBSD
  • Windows
Software
  • Easy-to-integrate NT-API
  • libpcap support
  • WinPcap support
  • Software PTP stack
Physical dimensions
  • ¬Ω-length PCIe
  • Low-profile PCIe with exchangeable front bracket
Regulatory Approvals and Compliances
  • CE
  • CB
  • RoHS
  • REACH
  • cURus (UL)
  • FCC
  • CSA
  • VCCI
  • C-TICK
Custom Solutions
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