Silicom PE210G2TSi9 Dual port 10 Gigabit ethernet PCIe Server adapter
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Silicom’s 10 Gigabit Ethernet PCI Express Time Stamping server adapter is designed for high-precision time-stamping of Ethernet frames with wire speed network performance.
The Silicom’s 10 Gigabit Ethernet PCI Express Time Stamping server adapter is based on a standard Intel 82599 controller, Silicom’s hardware based 8ns resolution precision time stamping and NTOP/Silicom DNA (Direct NIC Access) acceleration driver.
The Silicom’s 10 Gigabit Ethernet PCI Express Time Stamping server adapter unique architecture leverages capabilities of a standard Intel controller to enable time stamping of every packet in wire speed.
The Silicom’s 10 Gigabit Ethernet PCI Express Time Stamping server adapter offers the simplest integration into any monitoring device due to the use of the standard Intel 82599 Network controller with all it features as a leading controller in the market, with the addition of the time stamp capabilities added to it and with the DNA accelerating driver for Monitoring applications.
On board hardware time stamp engine insertion for of every received packet
On board precision oscillator of 25MHz / 0.02PPM
8nS time stamp resolution
UTC format via synchronization to host OS: GPS or PTP1588v2
BNC connector for external 1PPS clock source
Based on a standard Intel MAC controller using all its features
Based on NTOP/Silicom DNA acceleration driver
Supports line rate packet processing for any packet size
Supports packet re-ordering utilized by the DNA driver
Supports merged or independent mode done by DNA driver
In merged mode, received packets from both ports are inserted into a single DMA host buffer in the order in which they were received, done with DNA driver
Supports Intel 82599 MAC controller features without any limitation
Interface Standard: | PCI-Express Base Specification Revision X8 / Gen 2.0 (5GT/s) |
Board Size: | Standard height short: 167.64mm x 109.1mm (6.6” X 4.296”) |
Controller: : | Intel 82599EB |
Time Stamp Engine | Silicom HW FPGA |
HW Time stamp | Add Time Stamp info into the End of the packet. No other change to the packet and its flow |
Oscillator | 25 MHz / 0.02PPM |
Operating system support: | Linux |